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[VHDL-FPGA-Verilogdivider

Description: 介绍了除法器的设计,采用verilogHDL语言,利用modelsim仿真验证,压缩包中包含了流程图-Introduced the divider design, using verilogHDL language, the use of ModelSim simulation, compressed package that contains a flow chart
Platform: | Size: 83968 | Author: yaoyongshi | Hits:

[VHDL-FPGA-VerilogI2C

Description: 用verilog HDL实现I2C Master Controller 的设计,包括主程序设计和测试程序设计-Verilog HDL using I2C Master Controller to achieve the design, including the main program design and test program design
Platform: | Size: 211968 | Author: zbs | Hits:

[Othertraffic

Description: 实现路口交通灯系统的控制方法很多,可以用标准逻辑器件,可编程控制器PLC,单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持,在一定程度上增加了功能修改及系统调试的困难。因此,在设计中采用EDA技术,应用目前广泛应用的Verilog HDL硬件电路描述语言,实现交通灯系统控制器的设计,利用MAX+PLUS 集成开发环境进行综合、仿真,并下载到CPLD可编程逻辑器件中,完成系统的控制作用。-Intersection traffic signal systems to achieve the control of many ways you can use standard logic devices, programmable logic controller PLC, microcontroller and other programs to achieve. However, the functions of these control methods require modification and debugging support for hardware circuit, to a certain extent, an increase of functional modifications and system debugging difficulties. Thus, in the design using EDA technologies, applications, the widely used Verilog HDL hardware circuit description language to realize the design of traffic signal system controller, using MAX+ PLUS a comprehensive integrated development environment, simulation, and downloaded to the CPLD programmable logic devices to complete the system control role.
Platform: | Size: 1024 | Author: 沈田 | Hits:

[VHDL-FPGA-Verilogeda

Description: 利用FPGA可编程芯片及Verilog HDL语言实现了对直流电机PwM控制器的设计,对直流电机速度进行控制。介绍了用Verilog HDL语言编程实现直流电机PwM控制器的PwM产生模块、串口通信模块、转向调节模块等功能,该系统无须外接D/A转换器及模拟比较器,结构简单,控制精度高,有广泛的应用前景。同时,控制系统中引入上位机控制功能,可方便对电机进行远程控制。-Using FPGA programmable chip and Verilog HDL language for the design of DC motor PwM controller, DC motor speed control. Introduced with the Verilog HDL language programming controller PwM DC PwM generated module, serial communication module, steering adjustment module and other functions, the system is an external D/A converters and analog comparators, simple structure, high control precision, there a wide range of applications. Meanwhile, the introduction of PC control system control functions can be easily remote control the motor.
Platform: | Size: 4268032 | Author: 杨汉轩 | Hits:

[VHDL-FPGA-VerilogVGA_CCD531

Description: 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划,接下来并行开展了软硬件设计。在硬件方面,充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源,并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器;在软件方面,本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的转换与显示等功能,并能通过键盘操作和用户界面控制样机拍照和相片浏览。实验结果表明本样机系统设计正确,软硬件各模块绝大部分工作正常,为进一步研究数码相机的应用建立起了一个实用平台。-This paper focuses on a Nios II soft core processors, programmable on-chip system to launch a digital camera prototype design. Firstly, the overall function of the prototype to be achieved by planning, then in parallel hardware and software design. Take full advantage of the hardware side, using the platform provided by the SD card slot, keyboard, digital tube, SRAM and other hardware resources, and using Verilog HDL hardware description language to design a prototype system VGA interface controller, CMOS image sensors interface controller and the VGA display memory the software side, based on the Nios II soft core processor implemented in C, the SD card driver, and the transplantation of the FAT file system, the VGA display driver, and BMP image file conversion and display function, and through the keyboard and user interface control prototype photographs and photo browsing. The experimental results show that this prototype system is designed properly, most of the hardware and softwa
Platform: | Size: 15078400 | Author: | Hits:

[Special Effectsgrayscale

Description: 灰階(gray-scale)圖像處理(60*60 pixel)controller控制各個程式的地址以及開關,input_mem將資料讀進記憶體,grayscale將讀取資料像素的亮度以數值來表示,將24bit的 像素化成四個8bit的值輸出。接著進入sobel,在此將前面的四個值乘上1或-1個別的相加,得出新的四個值,輸入進shiftcase進行threshold的判斷,大於threshold則表現出白色(255),小於threshold則表現出黑色(0),最後將結果存入記憶體out_mem。//Verilog-Implement digital image processing through HDL. Design a system to perform simple image processing using mask. Refer to the presentation slides “Simple Image Processor”.
Platform: | Size: 76800 | Author: sara kuo | Hits:

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